1. Field of the Invention
The present invention relates to a solid state imaging element including: a photoelectric conversion element; a large number of vertical electric charge transfer passages for transferring electric charges, which are generated in the photoelectric conversion element, in the vertical direction; and a horizontal electric charge transfer passage for transferring electric charges, which are transferred in the vertical electric charge transfer passages, in the horizontal direction perpendicular to the vertical direction.
2. Description of the Related Art
FIG. 29 is a partially enlarged view showing a commonly used solid state imaging element.
The solid state imaging element shown in FIG. 29 includes: a photoelectric conversion element not shown in the drawing two-dimensionally arranged on a semiconductor board; a large number of vertical electric charge transfer passages 11 for transferring electric charges, which are generated by the photoelectric conversion element, in the vertical direction Y; a horizontal electric charge transfer passage 12 for transferring electric charges, which are transferred in the vertical electric charge transfer passages 11, to the horizontal direction X perpendicular to the vertical direction Y; an electric charge accumulating region 16 for connecting the vertical electric charge transfer passages 11 with the horizontal electric charge transfer passage 12; and a line memory LM including a memory electrode 13 formed in an upper portion of the electric charge accumulating region 16. The vertical electric charge transfer passage 11, the electric charge accumulating region 16 and the horizontal electric charge transfer passage 12 are formed out of, for example, an n-type impurity layer.
In an upper portion of the horizontal electric charge transfer passage 12, a plurality of electrode sets, in which the reverse-L-shaped electrode 14 and the rectangular electrode 15 are arranged in the horizontal direction X in this order, are arranged in the horizontal direction X. This electrode set includes: a first electrode set upon which the transmission pulse φH1 is applied; and a second electrode set upon which the transmission pulse φH2 is applied, wherein these are alternately arranged in the horizontal direction X. When the transmission pulse φH1 becomes the high level and the transmission pulse φH2 becomes the low level, the horizontal electric charge transfer passage 12 in a lower portion of the first electrode set operates as an electric charge accumulating region in which the electric charges can be accumulated and the horizontal electric charge transfer passage 12 in the lower portion of the second electrode set operates as a barrier region between the electric charge accumulating regions. On the other hand, when the transmission pulse φH1 becomes the low level and the transmission pulse φH2 becomes the high level, the horizontal electric charge transfer passage 12 in a lower portion of the second electrode set operates as an electric charge accumulating region in which the electric charges can be accumulated and the horizontal electric charge transfer passage 12 in the lower portion of the first electrode set operates as a barrier region between the electric charge accumulating regions. As described above, in the horizontal electric charge transfer passage 12, a plurality of electric charge transferring stages, which operate as a barrier region or an electric charge accumulating region according to a level of the applied voltage, are formed out of the first and the second electrode set.
JP-A-2007-27977 discloses a solid state imaging element having a vertical electric charge transfer passage, a line memory and a horizontal electric charge transfer passage.
In the solid state imaging element composed as shown in FIG. 29, one electric charge transferring stage is correspondingly provided for one vertical electric charge transfer passage 11. Therefore, in the case where a pixel size is reduced without changing a width in the horizontal direction of the horizontal electric charge passage 12 so as to meet the requirement of increasing the number of pixels, a width in the horizontal direction of the electric charge transferring stage (shown by the reference mark A in FIG. 29) is reduced and an electric charge transferring capacity of the horizontal electric charge transfer passage 12 is decreased. It can be considered that a width of each electric charge transferring stage is expanded so as to ensure the electric charge transferring capacity. However, in this case, a width of the entire horizontal electric charge transfer passage 12 is extended in the horizontal direction. Accordingly, the electrostatic capacity is increased and the electric power consumption is raised. Further, in accordance with the increase in the number of pixels, the number of the electric charge transferring stages is increased. Accordingly, there is a possibility that the transmission efficiency is deteriorated in the case of high speed driving.